Index: trunk/sw/linker.lds
===================================================================
--- trunk/sw/linker.lds	(revision 32)
+++ trunk/sw/linker.lds	(revision 33)
@@ -2,9 +2,10 @@
  
 OUTPUT_FORMAT("elf64-sparc")
-ENTRY(main)
+ENTRY(__setup)
 
 
 SECTIONS { 
-  .text 0x00000020 : { *(.text) }
+  .boot 0x0000000000000020 : { *(.boot);}
+  .text : { *(.text) }
   .data : { *(.data) } 
   .bss :  { *(.bss)  *(COMMON) } 
Index: trunk/sw/uart.c
===================================================================
--- trunk/sw/uart.c	(revision 32)
+++ trunk/sw/uart.c	(revision 33)
@@ -1,5 +1,5 @@
 #include "uart.h"
 
-const int UART_BASE_ADR[1] = {0};
+const long UART_BASE_ADR[1] = {0x800000FFF0C2C000};
 const int UART_BAUDS[1] = {0};
 const int IN_CLK =50000000;
@@ -32,9 +32,20 @@
 volatile int tx_level, rx_level;
 
-void main() __attribute__((noreturn));
-void main() 
+void sal_main() __attribute__((noreturn));
+void sal_main() 
 {
-	asm("mov 0x00, %sp\n");
-	asm("mov 0x00, %fp\n");
+
+
+/*
+  #define CONFIG_SYS_GBL_DATA_SIZE       128     / size in bytes reserved for  initial data 
+  #define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+  #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
+
+
+stackp:
+	        set     CONFIG_SYS_INIT_SP_OFFSET, %fp
+	        andn    %fp, 0x0f, %fp
+	        sub     %fp, 64, %sp
+*/
 	uart_init(0);
 	for(;;) { 
@@ -49,8 +60,10 @@
 	int divisor;
 	float float_divisor;
-	
 	/* Reset receiver and transmiter */
 	REG8( UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14;
-	
+	//asm("clr %sp \n");	
+	//asm("sethi %hi(8), %sp \n");	
+	//asm("mov 0xfff, %sp \n");	
+
 	/* Disable all interrupts */
 	REG8(UART_BASE_ADR[core] + UART_IER) = 0x00;